; gen pattern
        lxi h,GBL_4K
        mvi d,0
        lxi b,4096
rc1:    mov M,d
        inx h
        inr d
        dcx b
        mov a,b
        ora c
        jnz rc1
; write MM
        lxi h,GBL_4k
        lxi d,GBL_ZERO
        lxi b,4096
        call mm_store
; zero pattern
        lxi h,GBL_4K
        mvi d,0
        lxi b,4096
rc2:    mov M,d
        inx h
        dcx b
        mov a,b
        ora c
        jnz rc2
; read back MM
        lxi h,GBL_4k
        lxi d,GBL_ZERO
        lxi b,4096
        call mm_fetch
; check pattern
        lxi h,GBL_4K
        mvi d,0
        lxi b,4096
rc3:    mov a,M
        cmp d
        jz owk
        call debug_asc_HL
        asc "err$"
        push b
        mvi c,4
        call debug_dump
        pop b
owk:
        inx h
        inr d
        dcx b
        mov a,b
        ora c
        jnz rc3
        call debug_asc
        asc "pass$"
        ret